Looking for a more complete VIP example sensitive to clock and reset
Hi, I started to play around with the basic scoreboard example provided in the uvm-systemC 1.0 beta 2 release. I was trying to enhance the example by adding a clock and a reset signal in the sc_main....
View ArticleBuilding error 'undefined reference to..'
Hi! I am having a problem with not being able to build any code that contains any usage of SCV functions. This is a simple code that I am trying to build and run: #include <scv.h> int...
View ArticleSCV_CONSTRAINT on sliced bit range
Dear accellera community, I'm trying to assign randomization constraint to a bit range: tb.cpp: #include "systemc.h" #include "scv.h" // // struct addr_rnd : public scv_constraint_base {...
View ArticleSystemC Testbench
hi All, Can you please suggest the recommended way to create a SystemC testbench for SystemC model verification? I looked at UVM SystemC as well, considering that its relatively new, do you suggest...
View ArticleUVM-SystemC Compilation error (LINUX)
hi All, I am trying to compile UVM-SC in linux (gcc version 4.1.2, SUSE Linux Enterprise Desktop 11 SP4) but it fails at 'gmake check' with the below error:...
View ArticleUVMSC-TLM2.0 Interface
Hi All , I'm exploring uvmsc as a vitrifaction strategy .Does any one did already with TLM 2.0 model interface .If yes please share me the example to integrate in my environment .As per LRM...
View ArticleSystem verilog Assertions
Hi All, i am new to Assertions, can you any one help me on how to check the phase difference in two clocks. Thanks in Advance, PVR
View ArticleProblem with re-directing report into log file
Hi, I am trying to redirect report messages of all the components into a log file as shown below. 1. In top_test.h: UVM_FILE default_report; std::unique_ptr<std::ofstream>...
View ArticleUVMSC compilation failure on OSX
Hi, UVMSC fails to compile of OSX with the error message below. The "macros" archive contains no symbols (just seems to be a macro definitions), so it shouldn't be compiled into an archive. Making all...
View ArticleCRAVE
Hi All , Try to install crave for UVM-SystemC verification from following path https://github.com/agra-uni-bremen/crave Getting following error : Consult 'bootstrap.log' for more...
View Articlescv_tr_stream memory leak in scv-2.0.1?
It seems scv_tr_stream destructor forgets to delete the pointer '_scv_tr_stream_core_p' which is allocated in its constructor. AddressSanitizer could capture this issue.
View ArticleHow to run the uvm-systemc by command
I cannot find any information about how to run the code by command under the uvm-system. Could any one tell me about it
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uvm-systemc install problem
For beta 2.0 and 1.0 version, i used gmake check but both failed in one example (attached). Could anyone tell me what causes that? btw, when i was installing it shows warning for signed overflow is...
View ArticleParametrized Constructor for UVM system-C test
Hi would like to call a UVM SystemC test inside another UVM systemC test. While doing so, I would like to pass a parameter to the first test so that it uses that value an accordingly runs the test,...
View ArticleHow to change the value of a hash define during run time of UVM SystemC Tests?
-runcmd_args+="DPI_CFLAGS+=-DHASH_DEFINE_VAL=1" does not update or pass on any value change to the define where "HASH_DEFINE_VAL" is a #define in one of the headerfiles that are compiled. Is there a...
View ArticleIs SystemC-Verification (SCV) useful for analog circuits(SystemC-AMS) ?
Hi All Is SystemC-Verification (SCV) useful for analog circuits(SystemC-AMS) ? or Do we have to use CRAVE?
View ArticleExample Makefile to run uvm-systemc
Hi All, Iam trying to run uvm- systemc using makefile. Iam following the instructions given in INSTALL file and editing the Makefile given in example dir. But iam getting errors. Could you Please...
View Articleis SCV 2.0.1 usable with Systemc 2.3.3 ?
Hello, is SCV 2.0.1 usable with Systemc 2.3.3 ? The SCV page only mention SystemC 2.3.2 Thanks by advance
View ArticleUVM-SystemC 1.0-beta3 released
UVM-SystemC 1.0-beta3 was released for public review. Download available at https://www.accellera.org/downloads/drafts-review. Notable changes since 1.0-beta2: Register API Bugfixes & SystemC...
View Articlerandomize a vector of values using scv
how to randomize a vector of values without initializing the vector in a transaction. for example in pkt i have std::vector<int> vint; how do i proceed to add scv_extensions to it
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